Josh Fisher
| Josh Fisher | |
|---|---|
Josh Fisher in 2014.
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| Born |
July 22, 1946 Bronx, NY, USA |
| Fields | Computer Architecture, Compiling, Embedded Systems |
| Institutions | Yale University, Multiflow Computer, Hewlett-Packard Laboratories (retired) |
| Alma mater | Courant Institute of Mathematical Sciences (New York University) |
| Known for | The Invention of VLIW Architectures, Instruction-level Parallelism, Trace Scheduling, Co-Founder of Multiflow Computer |
| Notable awards |
Eckert-Mauchly Award, (IEEE/ACM 2003) B. Ramakrishna Rau Award (IEEE-CS 2012) Connecticut Entrepreneur of the Year (1987) Presidential Young Investigator's Award (NSF 1984) |
Joseph A "Josh" Fisher is an American computer scientist noted for his work on VLIW architectures, compiling, and instruction-level parallelism, and for the founding of Multiflow Computer. He is a Hewlett-Packard Senior Fellow (Emeritus).
Fisher holds a BA (1968) in mathematics (with honors) from New York University and obtained a Master's and PhD degree (1979) in Computer Science from The Courant Institute of Mathematics of New York University.
Fisher joined the Yale University Department of Computer Science in 1979 as an assistant professor, and was promoted to associate professor in 1983. In 1984 Fisher left Yale to found Multiflow Computer with Yale colleagues John O'Donnell and John Ruttenberg. Fisher joined HP Labs upon the closing of Multiflow in 1990. He directed HP Labs in Cambridge, MA USA from its founding in 1994, and became an HP Fellow (2000) and then Senior Fellow (2002) upon the inception of those titles at Hewlett-Packard. Fisher retired from HP Labs in 2006.
Fisher is married (1967) to Elizabeth Fisher; they have a son, David Fisher, and a daughter, Dora Fisher.
In his Ph.D. dissertation, Fisher created the Trace Scheduling compiler algorithm and coined the term Instruction-level parallelism to characterize VLIW, superscalar, dataflow and other architecture styles that involve fine-grained parallelism among simple machine-level instructions. Trace scheduling was the first practical algorithm to find large amounts of parallelism between instructions that occupied different basic blocks. This greatly increased the potential speed-up for instruction-level parallel architectures.
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