Synchronous Serial Interface

Synchronous Serial Interface (SSI) is a widely used serial interface standard for industrial applications between a master (e.g. controller) and a slave (e.g. sensor). SSI is based on RS-422 standards and has a high protocol efficiency in addition to its implementation over various hardware platforms, making it very popular among sensor manufacturers. SSI was originally developed by Max Stegmann GmbH in 1984 for transmitting the position data of absolute encoders – for this reason, some servo/drive equipment manufacturers refer to their SSI port as a "Stegmann Interface". It was formerly covered by the German patent DE 34 45 617 which expired in 1990. It is very suitable for applications demanding reliability and robustness in measurements under varying industrial environments.

It is different from the Serial Peripheral Interface Bus (SPI): A SSI is differential, simplex, non-multiplexed, and relies on a time-out to frame the data. A SPI is single-ended, duplex, multiplex and uses a select-line to frame the data. However, SPI peripherals on microcontrollers can implement SSI with external differential driver-ICs and program-controlled timing.

SSI is a synchronous, point to point, serial communication channel for digital data transmission. Synchronous data transmission is one in which the data is transmitted by synchronizing the transmission at the receiving and sending ends using a common clock signal. Since start and stop bits are not present, this allows better use of data transmission bandwidth for more message bits and makes the whole transmission process simpler and easier. The clock needs its own bandwidth and should be included when determining the total bandwidth required for communication between the two devices.

In general, as mentioned earlier, it is a point to point connection from a master (e.g. PLC, Microcontroller) to a slave (e.g. rotary encoders). The master controls the clock sequence and the slave transmits the current data/value through a shift register. When invoked by the master, the data is clocked out from the shift register. The master and slave are synchronized by the common clock of the controller.

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